At Quobly, we have charted an achievable path toward a scalable quantum computer based on our silicon spin qubit technology. We are committed to explaining our technological choices simply, clearly, and realistically to all quantum computing stakeholders. Based on our own research, our conviction is that the same very-large-scale integration (VLSI) processes used to manufacture classical processors can be used to build large-scale quantum integrated circuits efficiently and cost-effectively in existing semiconductor fabs. Here’s why.
A brief history of quantum computing
Quantum computing is not a new idea. With decades of research on individual qubits behind it, the concept of using quantum bits to encode and compute information has been proven possible. Today, the research has shifted toward how to scale up quantum computers. In practical terms, scaling up quantum means having enough good-quality qubits to achieve what is known as quantum advantage (the demonstrated ability to solve a given real-world problem faster than a classical computer). The main hurdles to scalability are:
- Variability
- Noise
- Errors
- How to connect the many qubits within the system
In terms of quantum computing hardware, at the time this article was written, the state-of-the-art stands at devices with 1,000-plus physical qubits—still very far from the estimated million or more that would be required to achieve quantum advantage for specific problems. Qubit and/or connectivity-intensive error correction protocols are the main reason so many qubits will be needed. The quantum hardware is only part of the future quantum stack, however.
Software will also be needed, and very substantial resources are already being invested in development across the quantum software stack, from the lowest and intermediary levels (pulse-level gate implementations, how to decompose quantum circuits into native gates) to the highest level (integrating quantum computation into existing classical workflows seamlessly, providing computational advantage).
The million-qubit question(s)
Two fundamental questions underpin quantum scalability.
- The first is whether it is actually feasible to control millionqubit machines.
- The second is whether coherence can be maintained in machines at this scale while millions of operations are being performed.
The scientific and technological challenges to building a quantum machine of this size are not to be underestimated.
However, as we will explain, at Quobly, we believe that silicon spin qubits, which are small (with a footprint under 1 μm²) and can operate at relatively high temperatures (around 500 mK and up to 1.5 K), offer significant advantages over other qubit platforms.
One of these is that conventional industrial nanofabrication capabilities—already proven for manufacturing many, many more than a million identical objects for everyday chips like those used in our smartphones and computers—would offer a faster, more cost-effective, and resource-efficient path to manufacturing a large-scale quantum machine.
An added benefit would be the cointegration of classical control circuits with quantum circuits on the same die. This would put manufacturable quantum processors with large-scale control capabilities and, eventually, embedded quantum error correction within reach.
Combined, these advantages could result in a highly competitive cost per qubit.
Things are never that simple, especially in quantum
At Quobly, we know the semiconductor industry well enough to understand how long putting a new concept into production can take. In the case of innovative CMOS modules, it is more than a decade. To scale up our technology efficiently, i.e., within a reasonable timeframe and without the billions of dollars in investments that go into scaling up new CMOS technologies, we are convinced that silicon spin qubits would need to be fabricated using only marginally modified existing semiconductor manufacturing processes. The alternative would essentially be the capital-intensive development of a whole new industry and new resource-heavy fabs to manufacture quantum devices, duplicating decades of work that have gone into achieving the massive repetition of identical processes that has led to the kinds of advances we have seen in semiconductor manufacturing.
When it comes to quantum, there is one other major difference, and that is market size. The semiconductor industry, which generated around $600 billion in revenue in 2022, is driven by huge demand for chips for consumer electronics, telecommunications, and data processing. Conservatively, quantum computing may stay a niche market, not generating enough demand, in terms of units sold, to justify investment on such a massive scale.
At Quobly, our strategy is to leverage existing manufacturing infrastructure as much as possible while addressing the fundamental differences between classical and quantum computing. The main one being that, while CMOS technologies have been optimized to deliver high current, i.e., large amounts of charges at room temperature, silicon qubits require the manipulation of single charges at low temperature. All around the globe, strategies for adapting existing CMOS technologies to the specificities of quantum are currently being explored.
Semiconductor qubits are all about tradeoffs
In silicon spin qubits, quantum information is encoded in the spin degree of freedom of a single charge (electron or hole) trapped in a quantum well (also called a quantum dot) defined by external electrostatic potential applied to gates. Therefore, most of today’s research on silicon spin qubits points to the necessity for quantum dots to be defined solely by their electrostatic potential. But what is currently observed is that, sometimes, electrostatic disorder interferes with the definition of the electrostatic potential solely by gate voltage. The disorder potential can be induced either by charges in dielectrics or at the interfaces, or by defects in the semiconductor materials. Currently, the disorder can be too high to ensure precise control of the charge position. In practical terms, controlling charge position and, therefore, the deterministic position of the quantum bits, means reducing the amplitude of the disorder potential compared to the potential induced by the gate voltage. This tradeoff is a major figure of merit in semiconductor quantum devices.
In terms of the number of qubits, the most advanced developments are currently happening in academic research labs and are based on Si/Ge heterostructures to ensure robust quantum dot definition. While these systems, which open a very effective window for electrostatic charge manipulation in quantum dot arrays, are of high interest for initial scientific demonstrations, they bump up against some very real limitations in terms of scalability. The main issue is that they are not directly derived from existing CMOS technology, creating the need for significant development work (defect-free epitaxial growth of the heterostructures, gate stack development, ohmic contact optimization, etc.). Overall, the sensitivity of these systems to temperatures above 750 °C, for example, where significant interdiffusion between layers occurs, would make the high-temperature annealing used in conventional CMOS processes (at more than 800 °C) impossible, or would require drastic changes to the usual process flows.
Nonetheless, these systems are effective for small numbers of qubits, and adjustments do not impact yields at this scale. It also explains why advanced CMOS R&D centers are investigating how to adapt current processes to these temperature needs. Although a 12-qubit quantum processor was recently demonstrated on an industrial pilot line, implementation at a large scale still remains impractical. At Quobly, we believe that, despite the current performance of the approaches being explored in academic labs, a roadmap compatible with advanced CMOS technologies will get us to a scalable quantum computer fastest.
We are starting from qubit manufacturing processes that follow VLSI flows as closely as possible, and have already demonstrated that we can fabricate and operate good-quality one- and two-qubit gates. In our research, for example, we have also demonstrated that we can lower the impact of the gate dielectric interface when the back gate is used to pull the charges away from the interfaces. This has proven to be effective to reduce the amplitude of the disorder potential.
Partnerships with commercial semiconductor fabs vital to scaling silicon quantum computing
As we continue to make advances on R&D-grade fabrication lines, partnerships like the one Quobly recently signed with STMicroelectronics will now play a key role in scaling up our quantum processing unit (QPU) using the semiconductor giant’s 28 nm FD-SOI technology. The company’s circuit designers, device engineers, back-end engineers, and lithography experts will contribute valuable expertise that will help ensure the manufacturability of our QPU. As a fabless (or fab-light) quantum computing company, this unique partnership constitutes a major advantage for Quobly’s VLIS-driven path to scaling up quantum computing.
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